AI Has a Waveform Problem — From the Chip to the Grid

For years, the AI infrastructure debate has focused on one question: how much power will AI consume? Increasingly, another question matters just as much: how fast does that power change?

Large AI training systems can move rapidly between compute-heavy and communication-heavy phases. That means power demand does not stay steady. It rises and falls sharply as thousands of accelerators operate in sync. A 2025 paper on power stabilization for AI training data centers describes the issue plainly: “Because compute-heavy phases require much more power than communication phases, large power swings occur.”

NERC has documented the same phenomenon. In one AI training facility, transitions between training and checkpointing occurred in less than a second. In another case, a large data-center load fell from roughly 450 MW to 40 MW in 36 seconds before ramping back up. These are not just energy-consumption problems. They are waveform problems. From the grid to the board

Now zoom in several orders of magnitude. Digital electronics have their own waveform problem. Logic signals do not simply move between zero and one. They transition between them, and the shape and speed of those transitions matter.

Fast edges create high-frequency spectral content. That energy can become conducted or radiated electromagnetic interference, forcing engineers to manage it through shielding, filtering, PCB layout, grounding, spacing, decoupling, and other EMC techniques.

Texas Instruments notes that high slew rates can create EMI at the fundamental frequency and its harmonics. A national semiconductor engineering note, now hosted by TI, made an observation that still feels remarkably current: “If a silicon design engineer could shape both current and voltage waveforms around the device, these problems would be solved.”

That gets very close to the engineering philosophy behind Slip Signal Technologies. Different problems, similar instinct

Slip Signal’s technology does not solve grid-scale AI power transients. A data center changing load over milliseconds or seconds is fundamentally different from unwanted high-frequency spectral content generated by digital transitions. But there is an interesting parallel.

At the data-center level, engineers are developing batteries, energy-storage systems, and power-smoothing technologies to absorb or mask rapid load changes. At the board level, engineers use filters, shields, and other techniques to contain unwanted electromagnetic energy after it has been created.

Both approaches are necessary. But they raise the same broader question: What if we improve the waveform before adding more infrastructure around it?

Designing the signal itself

Slip Signal Technologies is developing Spectrally Efficient (SEDL) technology around that idea. SEDL is designed to reshape digital transitions so that a signal still performs its logical function while producing less unnecessary high-frequency spectral content. The goal is not to replace good EMC engineering. Filters, shielding, and careful board design will remain important. The goal is to attack more of the problem at its source.

Instead of asking only: How do we contain this signal’s emissions? We can also ask: Does the signal need to create that spectral content in the first place?

AI is making this way of thinking increasingly relevant. At the grid level, engineers are discovering that maximum power consumption tells only part of the story. They also need to understand the shape and timing of the load.

At the chip and board level, the same principle applies. Voltage and clock frequency alone do not tell the whole story. Rise time, fall time, harmonics, and spectral content matter.

Averages can hide the problem. The waveform reveals it. From megawatts to nanoseconds, that may become an increasingly important design principle: Before adding another layer to contain a problematic waveform, ask whether the waveform itself can be improved.

Sometimes the best place to solve a signal problem is where the signal begins.

Sources

NERC, Characteristics and Risks of Emerging Large Loadshttps://www.nerc.com/globalassets/who-we-are/standing-committees/rstc/3_doc_white-paper-characteristics-and-risks-of-emerging-large-loads.pdf

Choukse et al., Power Stabilization for AI Training Datacentershttps://arxiv.org/abs/2508.14318

Jensen et al., EasyRider: Mitigating Power Transients in Datacenter-Scale Training Workloadshttps://arxiv.org/abs/2604.15522

Texas Instruments, EMI Reduction Strategies With Clocking Deviceshttps://www.ti.com/lit/pdf/snaa408

Texas Instruments / National Semiconductor, Understanding and Eliminating EMI in Microcontroller Applicationshttps://www.ti.com/lit/an/snoa382/snoa382.pdf